Cypress Semiconductor FX2LP Manuale Utente Scaricare il pdf (Pagina 55)

CY7C68013A/CY7C68014A

CY7C68015A/CY7C68016A

Document #: 38-08032 Rev. *K Page 55 of 60

12.0 Package Diagrams

The FX2LP is available in five packages:

• 56-pin SSOP

• 56-pin QFN

• 100-pin TQFP

• 128-pin TQFP

• 56-ball VFBGA

Package Diagrams

51-85062-*C

Figure 12-1. 56-lead Shrunk Small Outline Package O56

0.80[0.031]

7.70[0.303]

7.90[0.311]

1.00[0.039] MAX.

SEATING

PLANE

0.18[0.007]

0.50[0.020]

0.08[0.003]

0.50[0.020]

0.05[0.002] MAX.

(4X)

0.24[0.009]

0.20[0.008] REF.

0.80[0.031] MAX.

PIN1 ID

0°-12°

6.45[0.254]

8.10[0.319]

7.80[0.307]

6.55[0.258]

0.45[0.018]

0.20[0.008] R.

8.10[0.319]

7.90[0.311]

7.80[0.307]

7.70[0.303]

DIA.

0.28[0.011]

0.30[0.012]

6.55[0.258]

6.45[0.254]

0.60[0.024]

TOP VIEW

BOTTOM VIEW

SIDE VIEW

E-PAD

(PAD SIZE VARY

BY DEVICE TYPE)

51-85144-*D

Figure 12-2. 56-Lead QFN 8 x 8 mm LF56A

1 2 ... 50 51 52 53 54 55 56 57 58 59 60

CY7C68013A/CY7C68014A 1
CY7C68015A/CY7C68016A 1
3.5 USB Boot Methods 4
3.6 ReNumeration™ 4
3.7 Bus-powered Applications 4
3.8 Interrupt System 4
Inside FX2LP Outside FX2LP 8
3.11 Register Addresses 9
3.12 Endpoint RAM 9
Port GPIF Master Slave FIFO 15
128-pin TQFP 16
100-pin TQFP 17
56-pin SSOP 18
5.0 Register Summary 29
R = all bits read-only 35
W = all bits write-only 35
10.2 Program Memory Read 38
10.3 Data Memory Read 39
10.4 Data Memory Write 40
10.6 GPIF Synchronous Signals 42
10.17 Sequence Diagram 50
12.0 Package Diagrams 55
Package Diagrams 55
51-85050-*B 56
51-85101-*C 57
A1 CORNER 58
PCB Material 59

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